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This is less of a question and more like general information/insight. For the Z7030 chips the FMC signals are routed to two different banks, bank 13 and 35. Bank 13 is a HR bank and bank 35 is a HP bank. This difference has an impact when it comes to differential signaling, especially LVDS with inte...

Hi, I have an issue with the VDMA used in the package. The VDMA write doesn't work after the first frame. More specifically this condition is never met: writingFrame == XAxiVdma_CurrFrameStore(&fb.vdma_hdmi, XAXIVDMA_WRITE) resulting in an endless busy wait. Any ideas to fix this or what the cau...

Thanks Chris!

Do you have any recommended PSU?

Hi,

My issue was a faulty JTAG cable. The board seems to work fine with the LED test bit file that Timoteo made.

Thanks,
Carl

Thanks for the test file Timoteo!

Hi, I have the same issue as Francois. I've tried with all three JP11 settings and none works. When booting in SPI mode I get the default uboot from the Trenz module, which indicates that it's connected and not fried. Is there a complete guide that contains all the required jumper settings to be abl...