Support.Tulipp.eu

Posted: **Sat Jan 14, 2017 7:47 pm**

Hello,
I need to connect the EMC2 to a flight controller with UART (RX TX GND). I am a bit confused with the datasheet, there is one UART but it is already connected to the RS232 USB connector. And there is also a LVTTL port. What should I or can I use?

Thanks,
Sebastian

Posted: **Mon Jan 16, 2017 2:41 pm**

The white connector (RS1) has 3 UARTs available to use.
There is another UART available: micro-usb at the IO extension board, but it is not directly connected to the FPGA, it needs to be configured by U14.

EDIT: micro USB has 2 MIO dedicated pins in the Zynq. RS232 and LVTTL have pins directly connected to bank 34 in the FPGA
Regards,
Timoteo

Posted: **Mon Jan 16, 2017 3:01 pm**

Thank you for your reply!
The UART-USB I need for viewing my output, so I would prefer RS232 or LVTTL.
Is it right that LVTTL only supports 1,8V (so my UART Device with 3.3V would damage my FPGA?

Therefore I have to use the RS232 UART...where can I find(buy) the male connector to that port?

Do I need to enable the ports in vivado?

Regards
Sebastian

Posted: **Mon Jan 16, 2017 3:52 pm**

Why do you think LVTTL supports only 1.8V?
As far as I know, being supplied by bank 34 of the FPGA, if that bank is supplied with 3.3V should be fine, shouldn't it?

About the male connector, one workmate passed me this, which I forward to you. It's for another board, but it should be the same connector in the EMC2:

What is the pinout for the RS232 connector, RS1?
The Product specification states that RS1 has 10 pins, but only 9 are listed. This is because the 10th pin is actually one of the fixing tabs which is connected to ground.
The pin out is shown in the picture below:

rs232.png (441.83 KiB) Viewed 8791 times

The Farnell part numbers for the connecting parts are:

For the housing: 615122 http://uk.farnell.com/molex/51021-0900/housing-crimp-receptacle-1-25mm/dp/615122?MER=sy-me-pd-mi-acce
For the crimps: 1125276 - This part is a pack of 10 30cm pre crimped wires. The crimps themselves are very awkward to do manually. http://uk.farnell.com/molex/06-66-0015/lead-skt-free-end-300mm-28awg/dp/1125276?MER=sy-me-pd-mi-acce

Posted: **Mon Jan 16, 2017 11:08 pm**

In the Design Specification it it said: http://www.sundance.technology/wp-conte ... 1-v3-4.pdf

4.12 TTL I/O
An 8 pin 2mm dual-in-line connector allows direct access to 4 SoC I/O pins. These have ESD (overvoltage and under-voltage) protection.
These pins support signal levels up to 1.8V only.

Maybe it depends on what is created in vivado?

To create the LVTTL port, do I have to use a special Port in Vivado?

Thank you!
Sebastian

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